TEST ENGINEERING MANAGER 3 Position Summary Semtech's Photonics Products fab produces InP-based gain chips and DFB lasers for high-speed optical communications. Following the HieFo acquisition, we are scaling capacity roughly 10× over the next 18 months. Our test infrastructure has to scale alongside it: more stations, faster cycle times, tighter integration with MES, the wafer history database, and yield analytics. We are hiring a Senior Test Engineer to own that scale-up on the CM side. You will participate in the architecture of the next generation of our production test platform, lead a small team of test engineers and technicians, and act as the technical authority on gain chip and laser test methodology across the sites. This is a hands-on senior role: you spend time at the bench, at the keyboard, and in front of a whiteboard with process and product engineers.

Key Responsibilities

Architecture & strategy – 30% Production test platform architecture for gain chip and DFB laser die-level, burn-in, and CoC outgoing QC — station-to-station correlation, throughput, MTBF, calibration cadence, and capital roadmap DOE and qualification methodology for new fixtures, new product introductions, and process changes (GR&R, Cpk, station-to-station t-tests, drift monitoring) Hands-on build & code – 50% Interface with R&R engineering team to design and build automated test stations: fixture mechanicals, optical alignment (lensed fiber, free-space), TEC stages, electrical interfaces, environmental control Develop instrument control and automation test software Write production-grade data capture: SQL schema definitions, parquet sidecars for analytics, robust failure handling, traceability back to wafer and chip ID Set the bar for code quality on the test team — version control, code review, documentation Customer & qualification – 20% Own the technical defense of CoC data with key customers; troubleshoot correlation gaps between our test floor and theirs Drive root-cause investigations on outgoing quality escapes back through the test flow

Required Qualifications

BS or MS in Electrical Engineering, Physics, Optical Engineering, or related discipline 7–12 years of test engineering experience in semiconductor, photonics, or precision-measurement environments, with at least 3 years in a senior or lead capacity